SFP+ Optical Transceiver Testing Challenges
SFP+ provides hand in reducing the overall system cost. On the other, its physical layer (PHY) and performance are put with brand-new burdens. The SERDES framer interface (SFI) between the host board and the SFP+ module displays great design and testing challenges.
One challenge attributes to the increased port density and the testing time required for 48 or more ports per rack. For example, there are 15 measurements each for the host transmitter tests, and each of these measurements using manual methods can certainly take from three to five minutes. This means it will take engineers more than an hour per port to complete the required tests.
The second one that engineers have to consider is: if a measurement fails, how can they determine which component is causing such a failure, and how they debug the issue to arrive at the root cause. Such determinations are especially challenging because of the tight physical packaging and compact designs.
Another challenge falls on the connectivity. That is: how to get the signal out from the device under test (DUT) to an oscilloscope. Test fixtures are typically required, but questions arise around consequently: whether the fixtures have been tested and validated against the specification.
The additional problem lies in the fact that the Juniper sfpp-10ge-sr requires some measurements to be performed using a PRBS31 signal. At a sampling rate of 50 Gsamples/s, the designer can acquire around 40 million unit intervals (UIs). At a sampling rate of 100 Gsamples/s, the instrument can acquire 20 million UIs. However, a PRBS31 pattern has a lot more than 2 billion UIs. Hence, acquiring an entire pattern poses a challenge.Learn:www.oemfibers.com
One challenge attributes to the increased port density and the testing time required for 48 or more ports per rack. For example, there are 15 measurements each for the host transmitter tests, and each of these measurements using manual methods can certainly take from three to five minutes. This means it will take engineers more than an hour per port to complete the required tests.
The second one that engineers have to consider is: if a measurement fails, how can they determine which component is causing such a failure, and how they debug the issue to arrive at the root cause. Such determinations are especially challenging because of the tight physical packaging and compact designs.
Another challenge falls on the connectivity. That is: how to get the signal out from the device under test (DUT) to an oscilloscope. Test fixtures are typically required, but questions arise around consequently: whether the fixtures have been tested and validated against the specification.
The additional problem lies in the fact that the Juniper sfpp-10ge-sr requires some measurements to be performed using a PRBS31 signal. At a sampling rate of 50 Gsamples/s, the designer can acquire around 40 million unit intervals (UIs). At a sampling rate of 100 Gsamples/s, the instrument can acquire 20 million UIs. However, a PRBS31 pattern has a lot more than 2 billion UIs. Hence, acquiring an entire pattern poses a challenge.Learn:www.oemfibers.com
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